The present invention generally pertains to the field of flat-panel displays. More particularly, the present invention is related to a technique for detecting electrical short circuit defects in a baseplate structure of a display.
The baseplate structure of flat panel displays of the field emission display (FED) variety comprise a number of emitter electrodes, which may run in parallel on a baseplate. Above these are a number of control or gate electrodes, which may run parallel to the emitter electrodes. Between the electrodes reside electron emissive elements or emitters. By applying a potential difference between selected gate electrodes and emitter electrodes, the electron emitters may be made to fire electrons at a phosphorescent display screen, thus illuminating the screen.
The screen of flat panel displays may consist of numerous sub-pixels, which are red, blue, or green picture elements. Each sub-pixel may be separately controlled by selecting exactly one of the control (gate) electrodes and one of the emitter electrodes. For example, by selecting a given gate (e.g., column) electrode and an emitter (e.g., row) electrode, a sub-pixel at the electrode intersection may be controlled. There may be thousands of electron emissive elements corresponding to each sub-pixel.
It is possible for newly manufactured baseplate structures of FEDs to have an electrical short circuit defect between a control (gate) electrode and an emitter electrode. If this happens, not only is control over the sub-pixel at the intersection of the electrodes lost, but all of the sub-pixels on the entire column and row associated with the electrodes may be lost as well. For example, the electrical short circuit defect will electrically connect the gate (column) electrode and the emitter (row) electrode. Thus, these two electrodes can no longer be used to create the potential difference necessary to fire any of their electron emitters. Essentially, the entire display is ruined when an entire column and an entire row of sub-pixels are lost due to an electrical short circuit defect. It is also possible for an electrical short circuit defect to form between two row electrodes or between two column electrodes. When any such electrical short circuit defects form, additional cathode processing steps are unlikely to be successfully completed.
Unfortunately, such defective electrical short circuits are all too common in newly manufactured baseplate structures of FEDs. For example, during the manufacturing process many layers are deposited and considerable etching of the layers is done. During such processing, it is possible for many defects to form. Additionally, the manufacturing clean room may have contaminants, which may lead to formation of electrical short circuit defects.
One conventional method for detecting electrical short circuit defects is to apply a voltage to the FED baseplate before the phosphorescent screen is attached and measure the magnetic field. For example, such a method is disclosed in U.S. Pat. No. 6.323.653, issued Nov. 27, 2001 to Field, et al., entitled xe2x80x9cMagnetic Detection of Short Circuit Defects in Plate Structurexe2x80x9d. However, magnetic detection of defects has several shortcomings. First of all, a magnetic head must be scanned across the FED baseplate at a very close range. It is very difficult to control the range between the magnetic head and the FED baseplate and head crashes are highly possible. Secondly, the strength of magnetic field is proportional to the current which generates it. As a defect with a high resistance will have a low current flowing through it, the associated magnetic field will be lowxe2x80x94perhaps too low to detect. Additionally, the resolution of the magnetic method may be unable to locate the exact sub-pixel which contains the electrical short circuit defect. Consequently, additional time is spent by an operator visually scanning for signs of a defect. Also, if the electrical short circuit defect does not have a visual signature, the defect cannot be visually located. Furthermore, when two defects are located in close proximity, for example, a few micrometers apart, the magnetic detection method is unable to resolve the two due to the wide magnetic signal. Additionally, the magnetic head must be scanned over the TAB bonding region for both rows and columns of the display at very slow speeds, which is a time consuming process.
Thus, a need has arisen for a method and system for detecting electrical short circuit defects in a baseplate structure of a field emission display (FED). A still further need exists for detecting such defects automatically. A still further need exists for detecting such defects with sub-pixel accuracy. A further need exists for a system for detecting defects over a wide range of resistances. A still further need exists for such a method and system which is fast, accurate, and reliable.
Embodiments of the present invention provide for a method and system for detecting electrical short circuit defects in a baseplate structure of a thin cathode ray tube display (e.g., a field emission display (FED)). Embodiments provide for such a system which detects such defects with sub-pixel accuracy. Embodiments provide for such a system which automatically detects such defects. Embodiments provides for such a method and system which detects defects over a wide range of resistances. Embodiments provide for such a method and system which is fast, accurate, and reliable.
A method and system for detecting electrical short circuit defects in a plate structure of a flat panel display is disclosed. For example, the display may be a field emission display (FED). In one embodiment, the process first applies a stimulation to electrical conductors of the plate structure. For example, a voltage differential is applied between the gate electrodes and the emitter electrodes of the field emission display (FED). In another embodiment, the stimulus is applied between two gate electrodes or two emitter electrodes. Next, the process creates an infra-red thermal mapping of a cathode region of the FED. For example, an infra-red array may be used to snap a picture of the cathode of the FED, alternatively, the FED may be scanned. Then, the process analyzes the infra-red thermal mapping to determine a region of the FED which contains the electrical short circuit defect.
Another embodiment applies a pre-determined voltage between electrodes of the plate structure to create a measurable temperature change in the electrical short circuit defect region, given the specific heat of the electrical short circuit defect region and the thermal sensitivity of the IR mapping.
Another embodiment waits a predetermined period of time after applying the stimulation before creating the infra-red thermal mapping. Therefore, the temperature change of the region of the plate structure containing the electrical short circuit defect is detectable with the IR mapping, given the specific heat of the region, the stimulus applied to the plate structure, and the thermal sensitivity of the IR mapping.
Another embodiment provides for a process which identifies the defect with sub-pixel accuracy by performing a second or more infra-red mapping of the region which a previous IR mapping process determined to contain the electrical short circuit defect. Then, the process analyzes this infra-red mapping to determine a sub-pixel of the plate structure which contains the electrical short circuit defect.
Another embodiment provides for a process in which an IR mapping process found an electrical short circuit defect to be in a point-like region. This process may comprise performing a second or more IR mappings of the point-like region to localize the electrical short circuit defect within the point-like region. In this fashion, the process may identify the electrical short circuit defect with sub-pixel accuracy within the point-like region.
Yet another embodiment covers a case in which an IR mapping process found an electrical short circuit defect to be in a region comprising a single line. This embodiment adds the step of evaluating the gradient of temperature with respect to distance along the line, thus automatically determining the defect to be in a sub-pixel within the region. A different embodiment handles this case by performing the step of visually/manually scanning the line-like region to find the defect.
Still another embodiment detects interruptions along an electrode. In this embodiment, a voltage is applied across opposite ends of a number of electrodes. If there is an interruption along an electrode, that electrode will not have resistive heating. The temperature difference between an electrode with an open circuit defect and electrodes without the defect may be detected with IR mapping. For example, a line-like region of lower temperature may indicate such an open circuit defect.
Still another embodiment provides for a process which creates an infra-red mapping of a TAB bonding area of the plate structure. This case may be used when an IR mapping process determines that the region containing the electrical short circuit defect forms two intersecting lines. This embodiment analyzes the infra-red mapping of the TAB bonding area to identify two coordinates for the electrical short circuit defect. Then, the process identifies a sub-pixel at the coordinates to localize the defect within the region.
Yet other embodiments provide for automatically substantially eliminating the defect. In one embodiment, the defect is substantially eliminated by directing a laser substantially at the region containing the defect.
Another embodiment provides for a system for identifying defects in a plate structure. The system comprises a plate structure comprising a plurality of electrodes. Furthermore, the system comprises a device operable to impress a potential difference two of the electrodes. The system additionally comprises a first infrared detector operable to detect a temperature difference the region of the plate structure containing the electrical short circuit defect after the potential difference has been applied, wherein the temperature difference is indicative of an electrical short circuit defect. The two electrodes to which the potential difference is applied may be a gate electrode and an emitter electrode, two gate electrodes, or two emitter electrodes.
Another embodiment adds to this system a second infrared detector operable to localize the defect with sub-pixel accuracy within the region of the FED that the first infrared detector determines to contain the defect. Although the present invention specifically recites the use of a second infrared detector, the present invention is well suited to an embodiment with more or less infrared detectors.
Another embodiment provides for a computer readable medium coupled to a bus in a computer system having a processor. The medium has a computer program stored thereon that when executed by the processor causes the computer system to implement a method for infra-red detection of an electrical short circuit defect in a baseplate structure of a field emission display (FED).
Another embodiment applies a first voltage to a plurality of first electrodes and a second voltage to a plurality of second electrodes of an FED. Then, this embodiment, identifies a region of the cathode which is at a higher temperature than the surrounding area of the cathode to determine the region of the FED which contains the electrical short circuit defect. A different embodiment identifies a region of the cathode which experienced a raise in temperature after the stimulation to locate the electrical short circuit defect.
These and other advantages of the present invention will no doubt become obvious to those of ordinary skill in the art after having read the following detailed description of the preferred embodiments which are illustrated in the various drawing figures.